With continuous development of semiconductor technology and the process nodes scaling, the metal gate-last technique has been adopted in front end gate process to achieve desired threshold voltages and to improve device performance. However, as device's critical dimension further shrinks, a conventional MOS field effect transistor (MOSFET), even formed with the gate-last techniques, will not meet the device's requirements for the performance. A fin field effect transistor (Fin FET), a new type of FET device, has gained broad attention as a substitute to the conventional MOSFET.
With conventional techniques, a common type of Fin FET's fin is formed by etching portions of the substrate. When the Fin FET formed by such method is in operation, besides the desired electron migration in the fin's upper portion, electrons also moves between the fin and the substrate, resulting in large leakage current.
To reduce the leakage current, a silicon-on-insulation (SOI) substrate is introduced to form a Fin FET. However, a fin FET on an SOI has certain disadvantages. First, undesired electrons continue to migrate in the lower portion of the fin even on an SOI substrate, therefore the leakage current remains high. Second, an SOI substrate is expensive.
Therefore, there is a need to provide a low-leakage-current Fin FET device.